In the field of non-volatile memories, flash memory scaling beyond a 45 nm node has become a real issue. Technologies to face this challenge are ferroelectric, magnetic and phase change memories, the latter one being promising for the replacement of flash and showing characteristic that may allow replacement of other types of memories such as DRAM. Phase change memories are a possible solution for the unified memory being an important step in the electronics art. OTP (“on time programmable”) and MTP (“multiple times programmable”) memories open a field that may present a great opportunity for phase change memories as well.
Phase change memories are based on a reversible memory switching using, for instance, chalcogenide materials. So termed “nucleation dominated” material GeTe—Sb2Te3 tie line, such as Ge2Sb2Te5, may be used in ovonic unified memory (OUM) devices. In this concept, the phase change material may be in contact with a bottom-resistive electrode to switch reversibly to a small volume of phase change material. In another application the active part of a memory device may be a phase change line formed in between two electrodes formed in the back end of line processing (BEOL) of a CMOS-based front end of line (FEOL).
Thus, phase change materials may be used to store information. The operational principle of these materials is a change of phase. In a crystalline phase, the material structure is, and thus properties are, different from the properties in the amorphous phase.
The programming of a phase change material is based on the difference between the resistivity of the material and its amorphous and crystalline phase. To switch between both phases, an increase of the temperature is required. Very high temperatures with rapid cooling down will result in an amorphous phase, whereas a smaller increase in temperature or slower cooling down leads to a crystalline phase. Sensing the different resistances may be done with a small current that does not cause substantial heating.
The increase in temperature may be obtained by applying a pulse to the memory cell. A high current density caused by the pulse may lead to a local temperature increase. Depending on the duration and amplitude of the pulse, the resulting phase will be different. A fast cooling and large amplitude may quench the cell in an amorphous phase, whereas a slow cooling down and a smaller amplitude pulse may allow the material to crystallize. Larger pulse amplitudes, so-called RESET pulses, may amorphize the cells, whereas smaller pulse amplitudes will SET the cell to its crystalline state, these pulses are also called SET pulses.
EP 1,469,532 discloses a process for manufacturing a phase change memory cell, comprising the steps of forming a resistive element, forming a delimiting structure having an aperture over the resistive element, forming a memory portion of a phase change material in the aperture, the resistive element and the memory portion being in direct electrical contact and defining a contact area of sub-lithographic extension. The step of forming a memory portion further includes filling the aperture with the phase change material and removing from the delimiting structure an exceeding portion of the phase change material exceeding the aperture.
However, programming conventional memory cells may require high power consumption.